Jaguar: The new micro-architecture low-power AMD brings
In February this year for the event 2012 Financial Analyst Day, AMD revealed that next year hope to release his new Jaguar microarchitecture , the successor to the current micro-architecture low-power Bobcat , used in the current Ontario and Zacate apu (Brazos Brazos 1.0 and 2.0).
Next month during the event Hot Chips Symposium , which will be held from 27 to 29 August this year, amd plans to unveil the first details of its new micro-architecture low-power jaguar architecture in which its future will be based APU Temash and Kabini, replacements of existing Ontario and Zacate APU respectively.
But with all the information that has been leaking in dribs and drabs over the past weeks, we feel that we have no need to wait until late next month to know much of what AMD will reveal about his new micro-architecture Jaguar.
The Micro-Architecture AMD Jaguar
Well we could consider as a K10.5 Bobcat on a diet, because in effect, Bobcat is based on the micro-architecture K10.5 which will cut the lines of execution, vector instructions (SSE 3DNow! and 4.0 / a) and caches, all in order to obtain a low power consumption. We could say that Jaguar will be a piledriver on a diet, with some cuts that seek to minimize their consumption and the number of transistors used in its manufacture.
Why we say this? Well thanks to an email sent by AMD with the developers of GNU Compiler Collection Compiller , where we learned that the new micro-architecture low-power AMD Jaguar will be compatible with the instruction set together under the name btver2, ie the same instruction set supported by the APU Trinity, the first chips based on the micro-architecture of AMD Piledriver (instruction sets btver1 grouped under the term corresponding to the instructions supported by microprocessors based on Bulldozer micro-architecture), which virtually confirmed that Jaguar will be based on Piledriver.
Being based on Piledriver, Jaguar will be based on modular architecture released in Bulldozer, so it is expected to have versions made up of one two modules Jaguar (two or four integer processing units “ALUs” + one or two units floating point “Flex-FP”), a fact that in some way and we had revealed itself in their drivers AMD Catalyst 8.98-120604th , showing that the APU Kabini (KB) have variants with two and four cores with TDPs of 5/12/17/25W (expected to have TDPs Temash 3.6 and 5.9W ).
Whereas the Trinity APU are based on a shortened version and the micro-architecture Piledriver, which he eliminated the third-level cache (L3), what else can eliminate him Piledriver AMD to reduce the number of transistors and consumption? Although this is the data for which still have to wait until August 28th to know, not very hard to guess that as with Bobcat, Jaguar AMD will cut the second-level cache (L2) by reducing its size module ( perhaps 512KB), or even surprise us with a unified design and shared between the two modules (1MB or 512KB).
As to the instruction set supported by Jaguar, these will be the same supported by Piledriver: MMX/SSE/SSE2/SSE3/SSSE3/SSE4a/SSE4.1/SSE4.2/ABM/CX16/AEX/PCLMUL/AVX/BMI/F16C/MOVBE/FMA3, which Jaguar will become a great challenge for future micro-architecture Silvermont from Intel, which will also debut in 2013 alongside the new generation of Atom chips.
Temash and Kabini
Temash and Kabini are the names of the first APU code based on the new micro-architecture of AMD Jaguar, but though both APU share the same micro-architecture, will be two very different products.
Temash will succeed the APU launched yet Hondo , and like it will not be an APU itself, but rather a soc (System on Chip), it will be a chip consisting of one or two modules Jaguar + AMD igp + Northbridge + Southbridge Radeon unified in a single chip very low power consumption. Although currently unknown what will Temash IGP is known to not be based on Core Graphics Next, making it quite likely that PGI has a vliw5 VLIW4 or up to 160 or 128 shader processors.
On the other hand, used the traditional design Kabini APU + chipset used by the current APU, and positioned to devices that require more computing power and graphics that provided by the SoC Temash because Kabini will consist of one or two modules Jaguar and an architecture-based IGP Graphics Core Next (the one used in GPUs AMD Radeon HD 7000 Series). Since Kabini is aimed at low power, most likely has with 256 shader processors (one compute unit “CU”).
Broadly speaking, we could say that AMD is betting everything on the modular architectures, transition began its microprocessors both Bulldozer and in its first GPUs with Core Graphics Next modular architecture, which next year finally show their synergy in operation together as parts of a single unit of computation, the concept that defined as AMD APU (Accelerated Processing Unit).
It is curious that these products aimed at low power, Intel and AMD have chosen initially opposite paths: Bonnell, the micro-architecture that are based on current Atom is based on the old P5 microarchitecture which “fatter” to adapt to a product “current” low-energy, while Bobcat is based on K10.5 who “lost weight” for the same purpose.
In the end, time seems to have given him reason to AMD, as well as Jaguar Silvermont will be based on modern micro-architectures “put on a diet”, but that in turn deliver better performance to the user that the opposite approach, ie The current used by Atom.Tags: amd, apu, AVX, btver2, CPU, fma3, fusion, GCN, igp, instructions, jaguar, Kabini, micro-architecture, microprocessor, Next Core Graphics, piledriver, processor, Radeon, soc, Temash, VLIW4, vliw5