The Intel Haswell microarchitecture Part 2
As revealed by Intel, the new Haswell microarchitecture promises much (expect the rest of its specifications in the course of the event IDF 2012). In this second article on the Haswell microarchitecture of Intel, we will focus on its integrated graphics (IGP).
The intel graphics architecture for fourth generation
If the micro-architecture Ivy Bridge saw a major change in the graphics, we could say that although Haswell refines the features introduced in its predecessor, uses brute force to achieve higher performance.
If both Nvidia and AMD have their GPUs based modular architectures (GPCs in Nvidia and AMD Compute Unis) with Haswell Intel unveils its fourth generation modular architecture known by its code name Denlow. As in previous articles we have not talked much about the organization of the Intel graphics architectures, although a little later here we go.
The Intel modular graphics architectures are based on various modules that Intel called Sub-Slice (Denlow preceding architectures are called Half-Slice), where each sub-slice is composed of multiple computational units referred to as Intel EUs , each EU in turn consists of four processors called ALUs, which play the role of shader processors.
In previous architectures a Sub-Slice consisted of six to eight EUs, but we Haswell each Sub-Slice has 10 EUs, where two Sub-Slice Slice up a (20 EUs), the base module of the modular architecture Intel. With Denlow Intel added the ability to use multiple Slices, so we have the following configurations:
- Denlow GT3: Formed by two Slices (40 EUs).
- Denlow GT2: Composed of a Slice (20 EUs).
- Denlow GT1: Composed of a Slice, but with a Sub-Slice disabled (10 Eus).
The Slices are interconnected with other units as the unit graphics raster, geometry, memory controller, screen, video encodig unit (Quick Sync), but adds a new unit Denlow: VQE (Video Quality Enhancement), which describe below.
Each VQE (Video Quality Enhancement)
This new unit on the GPU Denlow, is an engine dedicated hardware-accelerated video, which is in direct competition with video engines: VP (Video Processor) Nvidia and UVD (Unified Video Decoder). Eliminating the use of the EUs for video decoding calculations, leading to a dedicated unit, freeing them for other tasks like gaming graphics calculations.
The new unit VQE also promises to improve the quality of the videos, while introducing new features like video stabilization (competitor AMD Steady Video 2.0 present in Brazos, Trinity and Radeon HD 7000 “GCN”), all without neglecting consumption.
The yield of Denlow
Although architecture level, Denlow not introduce too many changes regarding Carlow (the Ivy Bridge IGP), entering some improvements and refinements in their units to offer a performance mayer, among its improvements include:
New graphics engine supports DirectX API 11.1, OpenGL 4.0 and OpenCL 1.2.
Greater independence CPU internal bus (consumer focused).
Improved texture units (Sampler 4 times faster).
Denlow may not look as impressive as rumored, but Intel promises that his successor will IGP integrated Broadwell significant improvements in the graphics.
More to come
At the moment this is data that Intel provided from the first day of IDF 2012 event, which is expected in the next few days release more information on its Haswell microarchitecture, which is likely to have to post an article on third cover all respects.Tags: 22nm, alu, architecture, AVX2, CMT, CPU, Denlow, FMA, fma3, Haswell, instructions, intel, micro-architecture, module, non-planar, performance, Slice, specs, Sub-Slice, Tri-Gate, VQE